CAS Latency Column Address Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. In general, the lower the CL, the better. 19 Timing19-19-19-43 Voltage1.2V ECCNo
Buffered/Registered Buffered (also called registered) memory module has a register between the DRAM module and the system’s memory controller. Buffered memory lessens the electrical load on the system’s memory controller, allowing more memory modules to be used at one time than would otherwise be possible. Compared to unbuffered memory, buffered memory is more stable but also more expensive. And buffered memory is mainly used in servers and workstations. Almost all registered memory is ECC (err